Lowell, MA, Jan 22nd 2011: Several companies/training institutes join Agnisys Programs. EASii-IC (Grenoble, France), TeamEDA (Chelmsford, MA, US) joined the Agnisys Fusion partner program. Rochester Institute of Technology (New York, NY) and DKOP Labs (Noida, India) joined the Agnisys Spark program.

 

Lowell, MA, June 10th 2010: GateRocket CTO Chris Shalick will present the benefits of using IVerifySpec at the Design Automation Conference 2010 in Anaheim, CA. This would also cover how IVerifySpec can get you fast closure for your verification challenges and keep the team focused.

 

Lowell, MA, June 10th 2010: IDesignSpec is now available for trial on Xuropa. This will enable trial of the software without any downloads or installs. This is now accessible at http://xuropa.com/agnisys .

 

Lowell, MA, Jan 29th 2010: IDesignSpec supports OVM Register Package 1.0. Agnisys, Inc., the leading provider of innovative automation tools for design and verification of high-end IP and SoCs, today announced the immediate availability of IDesignSpec with support for the OVM Register Package. This comes close on the heels of the news on the OVM Register Package 1.0 from Mentor Graphics.

With IDesignSpec, users can describe the entire register map right in their document. This “live” document automatically generates classes and structures compliant with OVM Register Package. Other outputs such as RTL, C/C++ headers, IP-XACT etc. are also possible. Customized outputs can be generated using either Tcl API or XSLT. Running in either interactive or batch mode, users can transform existing IP-XACT (1.4 or 1.5) files into OVM register classes.

“Our patent-pending approach removes the drudgery from the engineers’ life! Engineers don’t need to spend countless hours chasing register bits through the design, verification and validation process. Instead, they describe the register map once and for all, in a document, and that is considered “golden”. All files required by downstream processes are generated from that single source. This improves the engineers’ productivity and quality of results. IDesignSpec provides the most thorough and complete set of functionality in register management space,” said Anupam Bakshi, CEO at Agnisys, Inc.

"We are pleased that Agnisys has made available the first automatic generation of OVM 1.0 register package validated to run on the Questa® functional verification platform," said Dennis Brophy, director of strategic business development, Mentor Graphics. "As a highly active member of the Mentor Questa Vanguard Partnership program, Agnisys works with us to improve design and verification productivity."

IDesignSpec is available for Microsoft Word, Sun StarOffice, OpenOffice.org and Adobe FrameMaker*.

Unique customer engagement model

Agnisys has a unique engagement model, in that its support team helps the customer bring their existing register specs into IDesignSpec. It creates Tcl or XSLT scripts to create the exact output that works in the customer’s existing flow. Without spending much time customers are able to evaluate the tool and the improved work flow. Customers are not locked into the Agnisys file format since the files are stored in the native document editor, under complete control of the user.

A variety of licensing models are available including node locked, floating, site and subscription.

See complete press release here.

 

New Delhi, India, Dec 1st 2009: Agnisys joins Altera's ACCESS program. Agnisys Technology Pvt. Ltd. announced today that it was included in Altera's ACCESS program. "This will enable us to develop focused solutions for our common customers" said, Devender Kumar, Director, Agnisys Technology Pvt. Ltd.

 

Lowell, MA, May 1st 2009: Agnisys Inc, a startup dedicated to automating SoC Design and Verification methodology, today announced the release of IDesignSpec^TM(IDS), a new tool for Register Management and Automation for hardware designs. IDS decreases the time and effort to specify hardware registers and automates the generation of data required by RTL design, verification, diagnostic, software and lab debug. This reduces development cost while improving quality and time to market. IDS is targeted at companies developing IPs, SoCs, ASICs and FPGAs.
IDesignSpec^TM is available for limited time evaluations. For qualified non-profits, Agnisys is making the tool available for free. Click here for more details.

 

New Delhi, India, Jan 6th 2009: IDesignSpec^TM, Agnisys' flagship EDA product, won the 2nd prize at the EDA software contest held during the 22nd International conference on VLSI design and embedded systems. According to Dr. Vishwani D Agrawal, Chairman, VLSI Conference steering committee & Convener for the contest, "EDA is a critical cog in the semiconductor ecosystem ...The choice of 22nd International conference on VLSI design and embedded systems is apt since it is the largest congregation of professionals and academia encompassing the entire industry ...". "Innovation is critical for the revival of the EDA industry" said Devendra Kumar, Director at Agnisys Technology, "... we are grateful to receive such a positive endorsement from the organizers of India's largest international platform for the VLSI and embedded segments, ...". Click here for more details.

 

Noida, India, Oct 8th 2008: Agnisys presented a talk on its flagship product IDesignSpec^TM at the Embedded Systems Conference, India. The talk was well received by the audience. Download the presentation slides here.

 

Noida, India, July 10th 2008: Agnisys Technology Pvt. Ltd. today announced that it is partnering with Platform Computing Inc. of Canada. “… joining the Platform Alliance Network program would enable us to provide customized help to companies in the Indian Subcontinent engaged in Digital Design and other compute intensive pursuits. Our common customers would benefit as Agnisys would help them become more effective in using their Platform products.”, said Devender Kumar, Director at Agnisys Technology Pvt. Ltd. Click here for more details.

Noida, India, Jan 28th 2008: Agnisys Technology Pvt. Ltd. today announced that it would promote the use of Open Verification Methodology (OVM) created by Mentor Graphics and Cadence Design Systems. Agnisys would offer its hardware verification services, Verification IP and its EDA tools to support the OVM. Click here for more details.

Noida, India, Jan 23rd 2008: Agnisys Technology Pvt. Ltd. moved into a bigger state-of-the-art development facility in Noida, India. "With the unprecedented growth, we were busting at the seams in our old offices", said Devender Kumar, Director, Agnisys Technology Pvt. Ltd.. "The new facility would give us room to grow and give our team the much needed space for a Gym and other extra-curricular activities". Agnisys offers software development, consulting and training in a variety of fields such as Hardware, EDA and IT.

New Delhi, India. Sept. 19th 2007: Agnisys Technology Pvt. Ltd. today announced that it has joined Mentor Graphics' Questa Vanguard Program (QVP). Mentor has established the QVP to bring its customers "world-class product integrations and interoperability". QVP extends Mentor Graphics' breadth of design and verification technologies through partnerships with other industry-leading companies that provide verification related tools and methods, verification IP, conversion services, training and consulting. Agnisys would extend its consulting and verification IP development services to regional as well as global markets.

New Delhi, India. March 27th 2007: Agnisys Technology Pvt. Ltd. today announced that it has forged an agreement with TeamEDA of Chelmsford, MA, USA. According to terms of the agreement TeamEDA would market Agnisys' services to US customers in the Massachusetts area. Additional details of the deal have not been disclosed.