20 Advantages for Automating your ASIC or FPGA Transition from Specification to Design
The transition from specification to hardware is a challenging and time-consuming task in the design of complex ASIC and FPGA systems. Registers and memory-maps being an essential component of ASIC/FPGA designs, need to be managed and configured diligently, in order to avoid the potential errors, thereby improving the design quality and reducing the development time and cost.
Although the digital design flow is a bit different for ASIC and FPGA, they both include four main steps, namely: specification to RTL description, verification, RTL synthesis and floor planning/place-and-route. The generated code produced from each step of the design, has to be simulated, optimized and verified against the target specification.
This whitepaper discusses the semiconductor design challenges and how to automate the transition from specification to design for ASIC and FPGA projects.
The whitepaper discusses:
- The challenges faced by design teams managing design specifications
- Difficulty in keeping the register and memory map information synchronized between the specification, design, DV and documentation
- Comparison of non-automated and automated methods
- A summary of automated methods available today
- Recommended options
- The 20 Advantages your team will realize if they automate ASIC or FPGA transition fromsSpecification to design