Semiconductor Design and Verification Articles
Not your Average UVM Testbench Generator – Unveiling at DAC 2019
By Louie De Luna, Agnisys Chief Product Evangelist Being so immersed in the work and technology, it’s easy to forget where we are in this technological revolution. Some of us didn’t really appreciate the impact of the internet until we held it in our hands and swiped to the next pages of seemingly infinite information. In the last decade, we saw how the automotive industry converted most of their mechanical systems into electronics and ...
EDA Is Advancing – but Where Are the Women?
By Ishanee Bajpai – Senior Marketing Executive, Agnisys 1981 marked the beginning of EDA as an industry. Within a few years there were many companies specializing in EDA, each with a slightly different emphasis. As the ...
Out of the Office – Lessons from a client visit in Edinburgh
As we travel professionally, sometimes we tend to miss some of the scenery along the way. We can get a bit of tunnel vision as we busy ourselves with client meetings, conferences, socializing with potential new clients, ...
The Ultimate Shift Left
Important observations from Einstein and New England’s ice traders.. Albert Einstein defined it well: “Insanity is doing the same thing over and over again and expecting different results.” I have come across several ...
Electronic Design Automation Trade Show Update – 52DAC
Overheard a lot of talk about “Shift Left” – which refers to the higher levels of abstraction leading to higher levels of productivity. I find that interesting as we at Agnisys have been doing this left shift since ...
Automatic Register Verification Gains Acceptance at DAC
With the Design Automation Conference wrapping up this week in San Francisco, there is one thing we can say for sure – Automatic Register Verification (ARV) gains acceptance with design and verification teams. Last ...
DAC Day3: Presenting DVinsight, Universal Verification Methodology IDE
Ending the last day of DAC strong with a presentation of DVinsight, a Universal Verification Methodology IDE The highlight of the last day at DAC was my presentation at the verification academy booth. I presented ...
DAC Day 2: System On Chip Design Challenges Addressed by Agnisys
System on Chip Design Challenges – The Highlight of DAC Day 2 It was a very busy day for Agnisys on the second day of the Design Automation Conference. On day two, we learned how much our products address System on Chip ...
DAC Day 1: Universal Verification Methodology Adoption – Lots of Room to Grow
The first day of the Design Automation Conference for Agnisys was exciting. We experienced a higher traffic flow than Monday during previous years. This picture shows our booth at the DAC conference. For those of ...
In preparation for DAC 2014
As an EDA company our development cycle seems to revolve around DVCon and DAC. This year DVCon and DAC came fairly close together. I feel, we just finished DVCon and now we are preparing for DAC. Come to think of it, ...