Creating Test Sequences for RISC-V Cores and SoCs
By Louie De Luna, Agnisys Chief Product Evangelist The idea of an open-source CPU core was virtually unheard-of ten years ago - let alone using it for commercial applications. The CPU
Read more
Not your Average UVM Testbench Generator – Unveiling at DAC 2019
By Louie De Luna, Agnisys Chief Product Evangelist Being so immersed in the work and technology, it’s easy to forget where we are in this technological revolution. Some of us didn’t
Read more
Top 2018 Agnisys Resources
Every year we take a look back at the resources we've created to determine what you've found most useful. We invite you to take a look below at our top
Read more
Automating Register Verification with 100% Functional Coverage
By Louie de Luna, Agnisys Director of Sales and Marketing UVM has certainly improved reusability of verification environments for SoC projects, significantly lowering the verification costs throughout the electronics industry. Since
Read more