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DAC 2015 | San Francisco, CA | June 7-11, 2015

DAC 2015 | San Francisco, CA | June 7-11, 2015

 

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DAC 2015 will be held in San Francisco, California, at the Moscone Center.  Agnisys booth # 2509

This year Agnisys is presenting: 

IDesignSpec™ can capture designs in an executable form and generate UVM, synthesizable RTL, SystemC, C Headers, IP-XACT, SystemRDL, RALF, etc.

ARV-Sim™  is a complete register verification solution that integrates with VCS®, Incisive® and Questa® simulators. ARV-Sim completely automates the UVM verification process by generating TestBenches and sequences.

ARV-Formal™ is a complete solution that takes the register specification and RTL design as input and performs a formal proof to ensure all register operations conform to the specification.

ARV-Sim™ and ARV-Formal™ automatically test the interface between the registers and the application logic.

DVinsight™ is a smart editor to create SV/UVM code in a refreshingly new way. Its ability to provide visual guidance and its advance warning system makes it an indispensable companion for serious UVM code developers.

dac_exihibhit

 

 

 Attendees who view an Agnisys demonstration at DAC earn a chance to win a GoPro Hero digital camera!

Herocam

 

If you have any question, please contact us at here.