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DVCon India

The Design and Verification Conference (DVCon) India

05-06 September, 2022

Radisson Blu Bengaluru

Bengaluru, India

After its successful launch in 2014, the Design and Verification Conference & Exhibition is back again for this year .  It provides an excellent platform for industry folks to share innovation, knowledge, experience, and best practices among themselves covering Electronic System Level Design and Verification for IP and SoC, VIP development, and Virtual Prototyping for Embedded Software development and debugging.

Sponsored by Accellera Systems Initiative, the conference provides multiple opportunities to interact with industry experts delivering keynote speeches, invited talks, tutorials, panel discussions, technical paper presentations, poster sessions, and exhibits from ecosystem partners. The attendees will also get the latest information on various Accellera standards for system design, modelling, and verification. These standards include UVM, SystemC, SystemVerilog, PSL, Assertions for AMS, Verilog, IP-XACT, OCP, and many more.

Agnisys showed its specification automation solutions in booth 14 at DVCon India, and also conducted a short workshop on the topic “IP/SoC Design, Co-Verify, Co-Validate, Co-Everything in 45 Minutes!” In a design development cycle, all aspects from the specification, architecture, RTL design, and software design, to verification and validation, are challenging. This workshop focused on the challenges faced by SoC developers, driven by the convergence of applications onto a single device, and suggested methodology improvements using a revolutionary multi-platform solution, such as IDesignSpec (IDS-NG), for creating IPs, stitching them together into an SoC, building software and test sequences for the entire design, and documenting it.

By NO Comment September 5, 2022

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