After almost a decade of focusing on SV, UVM, SystemC to build software products and teaching advanced verification/modeling to hordes of professionals, Agnisys has launched its consulting division to address the dire need of the Semiconductor and Systems companies.
This is a significant move considering that we had avoided this path for the longest time as we were after the Holy Grail of developing EDA tools that eliminate or reduce the verification effort.
Despite the consolidation of the semiconductor industry in the last two years, the need for verification professionals is constantly growing. There is some hint that correspondingly the EDA industry is consolidating as well, which was proven with the recent acquisition of Mentor. The pressure on EDA companies is significant, on the one hand is the reduction of available customers due to consolidation and on the other is the rising cost of development of EDA products due to the limited number of engineers.
Rather than resist change, we feel that we should aid its flow. Hence this foray into design verification consulting. So if you need battle hardened engineers to work on your specific verification problem, we will not only help you, we will also use our tools for free on your project.
Here is some additional shameless marketing plug …
Agnisys Wide array of skill-set, includes:
- Languages: Verilog, SystemVerilog, UVM, SystemC-UVM, SVA, Specman-e
- Protocols and Verification IP: AXI, AHB, APB, PCI Express, USB 3, SATA
Up-to-date and deep knowledge of methodologies, including:
- Coverage or Metric Driven Verification
- Constrained Random Verification
- Document-centric or Specification-driven Design and Verification
- Formal Verification
- SoC Verification
R&D teams based in the US and India, capable of executing projects both on client-site as well as remotely using VPN/SSH-tunnel While we are already having great initial success, time will tell how long the boom in the Verification consulting space will last. Time, or Trump :)