+1 855-VERIFYY

Newsletter:Count Interrupts

Count Interrupts

Designs often have a need to count the number of times an interrupt signal occured. An interrupt is a signal generated and sent to the processor by hardware or software indicating that an event needs attention.

IDesignSpec has several properties for describing various aspects of the design. These properties can be used together to achieve new functionality! For example, to count the interrupt on the line you can use the counter properties.

{counter.sw.wr.enb=regname.fieldname,intr; counter.sw.wr=incr,1}

A block is taken with various registers and property is applied on it:



In the above example following properties have been used:


This property used to check any pending interrupt on that register. Pending register is originally the Logical And of interrupt source & enable field. Interrupt source can be registered in a flip flop or it can be a signal.


When interrupt source is asserted or detected for edge it writes 1 to status register. Firmware reads this register to identify active interrupts denoted by value 1 in field and acknowledges/clear the interrupts by writing one to it or reading from it.


The enable register enables the interrupts to propagate to CPU by writing one to it. Enable bit corresponding to Status register bit decides whether that interrupt will be allowed to propagate or not. Firmware writes one to bit position where It can be identified using property intr.enable at register or field

And finally, the set of properties {counter.sw.wr.enb=regname.fieldname,intr; counter.sw.wr=incr,1} are used to count the interrupt on that line which has not been cleared .


counter.sw.wr.enb=regname.fieldname,intr : Used to count the interrupts

counter.sw.wr=incr,1 : Increments the count of interrupts by 1.

Numerous other combinations are possible. You are limited only by your imagination!

By: Anmol