In a digital system, a reset is an action to clear any pending process and brings a system to normal condition or an initial state, usually in a controlled manner.
IDS supports reset conditions to reset any design circuit with two types:
- Soft reset
- Hard reset
The IDS property ‘resetsignal’ is used to add soft reset conditions in the RTL to reset any existing process on a hardware input signal. The property can also be used by combining all the reset signal properties with corresponding default values, as given below:
‘rst_sig1’ is the soft reset signal, described in the signal table
‘d_val’ is the default value of the corresponding soft reset signal
‘type’ is the type(sync, async ) of the corresponding soft signal
‘lvl’ is the level(low, high) of the corresponding soft signal.
This property has been enhanced to support the following values on a field at reset ‘d_val’ of the above example:
- Any other existing register field value
- Value of any input hardware signal
- Value of a defined parameter in the specification.
The property ‘resetsignal’ can accept the default value in the form of parameters, signals, and other existing register field values present in the given register specification. The default value of the field is updated with respect to the value assigned to the property on meeting the soft reset.