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UVM registers | Agnisys - Part 2

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DVCon Europe Needs Automatic Register Verification and Generation

October 30, 2014 Antonio F Mondragon Comments Off on DVCon Europe Needs Automatic Register Verification and Generation

I feel like a bumblebee, going from the DVCon in US, to the next one in India to then to Europe.  All this cross-pollination is exciting and enriching when experiencing

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Getting Ready for DVCon India 2014

September 24, 2014 Antonio F Mondragon Comments Off on Getting Ready for DVCon India 2014

It is penultimate day – the day before the big event!

Preparing and launching the first ever DVCon India event feels like taxiing a plane down the runway, ready to take

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9 Ways Commercial Register Generation Tools Provide Greater Value Than Custom Scripts

July 17, 2014 Uttam Sarkar Comments Off on 9 Ways Commercial Register Generation Tools Provide Greater Value Than Custom Scripts

Register Generation Tools Provide Great Value

The ebb and flow of the EDA industry shifts where a semiconductor company would use commercial tools for each task

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The 5 Ways Register Generation Tools Reduce SV/UVM Implementation Time

July 17, 2014 Antonio F Mondragon Comments Off on The 5 Ways Register Generation Tools Reduce SV/UVM Implementation Time

Modern SoCs get more and more complicated each and every day.  As the complexity of modern electronic semiconductor device design increases, niche tools for every nook and cranny of the

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DAC Day 2: System On Chip Design Challenges Addressed by Agnisys

June 4, 2014 Antonio F Mondragon Comments Off on DAC Day 2: System On Chip Design Challenges Addressed by Agnisys

System on Chip Design Challenges - The Highlight of DAC Day 2

It was a very busy day for Agnisys on the second day of the Design Automation Conference. On day

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EDA Companies must Collaborate or Die

September 10, 2013 monikasharma85@gmail.com Comments Off on EDA Companies must Collaborate or Die

  Recently at the sidelines of DAC, Anupam Bakshi, CEO of Agnisys, Inc. sat down with Karen Bartleson, Director of Community Marketing at Synopsys to discuss a very

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Using IVerifySpec to test IDesignSpec: A case of doctor eating his own medicine!

May 28, 2013 monikasharma85@gmail.com Comments Off on Using IVerifySpec to test IDesignSpec: A case of doctor eating his own medicine!

IDesignSpec generates several outputs from a single spec. We started out as a simple tool that just dealt with registers. After 6 years the tool has metamorphosed

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IDesignSpec Provides Complete Register Design Automation

May 28, 2013 monikasharma85@gmail.com Comments Off on IDesignSpec Provides Complete Register Design Automation

Published on 05-19-2013 07:30 PM in Semiwiki It goes without saying that registers play a vital role in designing any ASIC, FPGA, SoC or System. In today’s world, while designing SoC

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Agnisys makes Design Verification process extremely efficient!

May 28, 2013 monikasharma85@gmail.com Comments Off on Agnisys makes Design Verification process extremely efficient!

Agnisys Inc. was established in 2007 in Massachusetts, USA, with a mission to deliver innovative automation to

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Customer’s Music and DVCon 2012

March 14, 2012 monikasharma85@gmail.com Comments Off on Customer’s Music and DVCon 2012

I admit it, I get a high when meeting customers and hearing how they are using our tools. It is a pleasure to see that we are

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