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#47DAC musings

We almost didn’t go to DAC this year, and that would have been a big mistake. Monday started out with one of our biggest competitor dropping by to say hello and get demos of our products. The remaining competitors also dropped by later. Maybe we can work together after all.

Over the course of DAC exhibit days, we had several large semiconductor companies drop by and we were in strategic meetings with some of our partners. This was great, since there is no other time or place one would get so much density of action. DAC is great for startups and we have already signed up for the next year.

At the Accellera sponsored breakfast about UVM/OVM it was nice to see a time line for register package (Oct 2010). We will of course follow it closely and come up with our implementation immediately. You really had to be there to see the collaborative/competitive nature of the meeting.

At my two talks at the UVM/Booth there was a decent turnout. For startups it is a great way to get more exposure. Thanks to Richard Brophy , Josef Derner @Mentor and Joe Hupcey @Cadence for organizing it.

Our IDesignSpec product for Register management wowed so many people, they were truly amazed at the ease of use and the innovative automation that it provides. Putting it on Xuropa also helped us spread the word. Due thanks to Harry the ASIC guy and James Colgen, CEO Xuropa.

Thanks to Chris, CTO @GateRocket who was available for the hour long poster presentation. There was interesting discussion about regression and verification management with some interested folks.

The BoF that I had tried to organize didn’t attract much attention. It was partly because of lack of sponsorship and time spent in advertising about it. I don’t think the subject of “Agile Verification Management".

ic designer's guide to automating design through implementation of semiconductors