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Agnisys announces DVCon specials for IDesignSpec™

Lowell, MA. Feb 28, 2014 – Agnisys, Inc. today announced two special offers at the start of DVCon 2014.

(1) IDesignSpec ™ Free: The free version of IDesignSpec™ now has capabilities to generate UVM models without any size restrictions. Additional details can be found here.

(2) IDesignSpec™ Purchase Offer Q1 2014: Free Training & Consulting Services worth $5000 on the purchase of IDesignSpec™. Additional details can be found here.

AnupamBakshi, CEO, Agnisys, Inc. said, “We are happy that Chip/IP development teams have started embracing the concept of Executable Specification Documentation. It’s a mouthful, but it means that the documentation is the golden repository of information and everything else is derived from it. This has great applications for teams that are focused on Quality and Time-to-market. There isn’t a better way to solve this multi-facet problem. Customers who have adoptedand realized the value ofIDesignSpec™ want to help us improve this concept even more. And we are happy to do so. These offers will help us take this product to the masses.”

He further said, “The Training & Consulting service offer will help users to learnand adopt technologies like UVM for SoC flow using IDesignSpec™ but it will help them adopt UVM in general.”

RohitBhadana, the Hardware Engineering Team Lead at Agnisys said, ”We are all set to showcase the latest in the Executable Specification arena where we find ourselves as the single contender of the coveted leadership position. We are excited to flaunt the new and advanced features recently included in IDesignSpec™ such as: Interrupts, Multiple Bus Domains, Automatic Register Verification and Special Registers, Low Power RTL, Datasheet Generation, etc.”.The details of the offers mentioned above can be reviewed here.

IDesignSpec™ datasheet can be reviewed here.

About Agnisys:Agnisys is a pioneer in delivering innovative tools to make Design and Verification teams more efficient. Agnisys specializes in creating tools for executable specifications such as IDesignSpec™ for Design Specification and IVerifySpec for Verification Plan Specification.

Contact:
NishantBatra
Marketing Manager
nishant@agnisys.com 
1-855-VERIFYY

Agnisys, Inc.
1255 Middlesex St. Unit I
Lowell, MA – 01851


Overcoming the weaknesses of traditional natural language specifications requires writing the specifications in a precise format rather than natural language, and making this format executable so that tools can generate as many files as possible for the design, verification, programming, validation, and documentation teams. Learn how Agnisys approaches a solution to this challenge that is available today.

streamline semiconductor design verification validation documentation