Agnisys joins the Xilinx Alliance Program – A path to simplify the specification and verification of Zynq Hardware/Software Interface
BOSTON, MA – December 4, 2018 – Agnisys Inc., a leader in Electronic Design Automation, and provider of the industry’s most comprehensive tools and methodologies for specifying the Hardware/Software Interface (HSI), announces its entry into the Xilinx® Alliance Program.
Joining the Xilinx worldwide ecosystem of qualified companies offering IP cores, EDA and Embedded solutions, engineering services and boards/kits, Agnisys aids system designers in the rapid and low-risk integration of Xilinx FPGAs, SoCs and Intellectual Property, by simplifying the process of specification and verification of the HSI.
New Hardware/Software Co-design for Zynq™ SoCs and MPSoCs
While the HSI is one of the most crucial areas of SoC development, the process is often fragmented from the start, making debugging the HSI time consuming and error-prone. As a solution, co-designing the HSI by multiple teams as a single activity within a single environment is often recommended.
IDesignSpec™ integrated with the latest release of Vivado™ both provide a seamless development process for specifying addressable registers, memories, and interrupts, and verifying them with the automatically generated RTL and test sequences for the software application.
“Highly requested by several of our Xilinx Zynq users, we were able to assist them in completing several designs in record time without any HSI issues,” stated by Anupam Bakshi, Agnisys Founder, and CEO. “Both of their HW and SW teams were able to efficiently edit and verify the HSI within the same platform provided by IDesignSpec.”
IDesignSpec is an award-winning product that helps IP/SoC Design architects and engineers to create an executable specification for registers and automatically generate output for SW/HW teams. The specifications can be written in Microsoft® Word™ or Excel™, LibreOffice™ with IDesignSpec editor Plugin or text-based industry standard formats like SystemRDL, RALF, IP-XACT. IDesignSpec captures simple as well as special registers, signals, interrupts, and then generates synthesizable RTL code and interfaces to ARM AMBA® buses like AXI, AHB, APB, AHB3Lite and other standard buses.
Agnisys Inc. is a leading supplier of Electronic Design Automation (EDA) software for solving complex design and verification problems for system development. Its products provide a common specification-driven development flow to describe registers and sequences for system-on-chip (SoC) and intellectual property (IP) enabling faster design, verification, firmware, and validation. Based on patented technology and intuitive user interfaces, its products increase productivity and efficiency while eliminating system design and verification errors. Founded in 2007, Agnisys is based in Boston, Massachusetts with R&D centers in the United States and India. www.agnisys.com
IDesignSpec™ is a trademark of Agnisys, Inc. All other trademarks cited herein are the property of their respective owners.
Media Contact: Louie de Luna, Agnisys Director of Sales and Marketing Phone: +1 855-VERIFYY Email: email@example.com
Overcoming the weaknesses of traditional natural language specifications requires writing the specifications in a precise format rather than natural language, and making this format executable so that tools can generate as many files as possible for the design, verification, programming, validation, and documentation teams. Learn how Agnisys approaches a solution to this challenge that is available today.