BOSTON, Mass. (01 March 2024) Agnisys, Inc., the pioneer and industry leader in Executable Golden Specification Solutions™ is thrilled to announce its participation in Design and Verification Conference (DVCon) US, where it will present two tutorial sessions on behalf of Accellera Systems Initiative and a comprehensive workshop on the use of the Portable Stimulus Standard (PSS).
DVCon US is the premier conference for design and verification engineers, offering a unique platform for industry leaders to come together and share insights, innovations, and best practices. Agnisys, Inc.'s presence at DVCon US underscores its commitment to driving innovation and standards in the electronic design automation (EDA) and semiconductor industry.
The workshop will address key challenges in complex IP and system-on-chip (SoC) projects. Manually developing register transfer level (RTL) designs, verification environments, device drivers, and documentation is time-consuming and error-prone. Attendees will learn how to generate all these files automatically from industry standards such as PSS and SystemRDL.
Agnisys, Inc. will also showcase its latest solutions at its exhibition booth, providing attendees with the opportunity to engage with experts and learn about the company's groundbreaking technologies. Additionally, the company will present in two tutorial sessions in association with the Accellera CDC and IP-XACT Working Groups, focusing on the latest topics in CDC verification and IP integration.
Workshop: Automatic Generation of Device Drivers and Programmer’s Reference Manuals from PSS
Date: March 4, 2024
Time: 13:30 PM - 15:00 PM
Location: Monterey Carmel
Tutorial: IP-XACT
Date: March 4, 2024
Time: 09:00 AM - 10:30 AM
Location: Fir
Tutorial: Hierarchical CDC and RDC closure with standard abstract models
Date: March 4, 2024
Time: 11:00 AM - 12:30 PM
Location: Fir
For more information about Agnisys, Inc. and its participation in DVCon US, please visit: https://www.agnisys.com/agnisys-at-dvcon-us-2024
About Agnisys
Agnisys, Inc., a provider of Electronic Design Automation (EDA) software and methodology services, solves complex front-end design, verification, and validation problems in system chip development. Its certified IDesignSpec™ Suite leverages a golden executable specification to capture and centralize registers, sequences, and connectivity for Intellectual Property (IP) and System-on-a-Chip (SoC) projects. Its intuitive user interfaces and standards-based workflows reduce risk by eliminating development errors while increasing productivity and efficiency through the automatic generation of collateral for the entire project development team. Founded in 2007, Agnisys is headquartered in Boston, Massachusetts, with R&D centers in the United States and India. Learn more at www.agnisys.com.
About Accellera CDC and IP-XACT Working Groups
The Accellera CDC and IP-XACT Working Groups are committed to advancing standards and best practices in the areas of clock domain crossing (CDC) verification and IP integration using IP-XACT. Through collaboration and industry expertise, the working groups drive innovation and adoption in these critical areas of electronic design.
