IDS-AI™: From Specification to Sign-Off, Dramatically Faster

Agnisys will demonstrate IDS-AI™, the industry’s first agentic AI framework purpose-built for semiconductor development. With nearly 45% of functional bugs caused by incorrect or incomplete specifications and only 14% of ASIC projects achieving first-silicon success, IDS-AI addresses design challenges at their source the specification stage.

Instead of relying on disconnected tools and manual handoffs, IDS-AI spans the entire semiconductor development flow, understanding design intent and driving specification creation, RTL generation, integration, and verification within a unified framework. It automatically delivers complete CSR verification coverage, identifies costly issues before implementation begins, and significantly reduces manual effort from golden specification to sign-off by combining advanced AI reasoning with the correct-by-construction methodology Agnisys has refined over more than two decades.

IDS-NoC™: Scalable Network-on-Chip Automation

Agnisys will also showcase IDS-NoC™, a solution designed to eliminate one of the most significant bottlenecks in modern SoC development building an interconnect fabric that scales efficiently for AI accelerators, automotive systems, and multi-core processors without the timing and integration limitations of traditional crossbar architectures.

Instead of manually designing routers and network interfaces, engineering teams can automatically generate a complete, deadlock-free NoC fabric with virtually unlimited scalability across instances and interconnect blocks. Because the generated RTL is provided as open, plain-text SystemVerilog rather than a black-box implementation, teams retain complete visibility and control over their IP. The result is reduced integration effort, faster time-to-market, and an interconnect architecture designed to support increasingly complex SoC designs.