Collaboration Framework (CF) Integration with IDS

Bhanu Sharma  

Introduction

Agnisys presents the Collaboration Framework (CF), an innovative tool designed to transform team collaboration, streamline workflows, and simplify content management across hardware and software development teams.

  • Centralized Project Management: CF enables real-time collaboration by allowing multiple users to work on a project simultaneously. With features like real-time editing, teams can reuse content, reduce redundancy, and optimize workflows efficiently.
  • Global Collaboration and Version Control: Powered by Git-based version control, CF provides a centralized workspace with a seamless, Google Docs-like editing experience, fostering global teamwork and consistent project updates.
  • Flexible Deployment Options: CF caters to diverse organizational needs with flexible deployment choices—whether on-premises for maximum control or cloud-based for enhanced accessibility.
  • Data Security and Complete Access Control: With robust admin controls, CF ensures secure operations by enabling selective team access to projects and assignment management based on team roles and levels.

By integrating advanced collaboration capabilities and secure, customizable workflows, the Collaboration Framework empowers teams to navigate the complexities of hardware and software integration with ease and efficiency.

Key Features
  • Fast HTML Rendering: Quickly loads and renders HTML content.
  • User-Friendly Interface: Provides a clean and intuitive design for seamless navigation.
  • Cross-Platform Compatibility: Works on multiple operating systems.
  • Lightweight: Consumes minimal system resources.
  • Customizable: Allows personalized settings adjustments to meet user requirements.
 CF in IDS-NG

In the IDS-NG GUI, CF is integrated seamlessly.

How it Works
  • Users can open the CF view within IDS-NG by clicking the CF icon or option in the interface.
  • This integration enables quick previews, file management, and interaction with HTML files directly within IDS-NG.
CF on the Web

CF also integrates with the web version of IDS, leveraging the VSCode Server.

Key Capabilities
  • File Management: Users can create, edit, and upload files (e.g., SystemRDL, IP-XACT, PSS, JSON) via the VSCode Server.
  • Coding Environment: Provides an efficient interface to write or upload files, making it a versatile tool for developers.
  • Output Exploration: Offers a variety of output formats, such as customizable HTML views, ensuring a tailored experience.

Generated HTML

Advanced Features of CF HTML Output
  • Enhanced Usability:Sorting, searching, filtering, and custom Table of Contents (TOC) columns.
  • Customizable Address Values: Improves organization and navigation.
Summary

The CF integration with IDS significantly enhances the user experience by offering:

  • A lightweight, efficient tool for rendering and managing HTML content.
  • Seamless workflows in IDS-NG and IDS-Batch for previewing, editing, and sharing files.
  • Advanced functionalities, such as sorting, filtering, and Git integration, to simplify workflows and improve productivity.

By embedding CF in IDS-NG and web environments, this integration addresses the diverse needs of developers, streamlining operations and fostering collaboration.

Third-party vendor Extensions in IP-XACT Using IDS-Integrate

Rahul Parashar   

Introduction                                                                                                                                                    

Managing vendor extensions in IP-XACT files can feel daunting, but with IDS-Integrate, it’s now easier than ever. The tool lets you:

  • Read vendorExtensions in IP-XACT files
  • Modify them to fit your specific needs
  • Generate updated IP-XACT files with your changes seamlessly integrated

Whether customizing third-party components or streamlining workflows, these features bring flexibility and efficiency to your process. Here’s a simple diagram to show how it works:

With IDS-Integrate, you can use scripts—written in TCL or Python—to manage vendorExtensions. Here’s an example that walks you through reading, modifying, and saving updated IP-XACT files.

Python Example
soc_read("top", file="SS_design.xml")
args = ["Agnisys", "mixed_signal", "SS_design", "1.0"]
soc_create("top",name="system",port={"input":["in"],"output":["out"]})
myext = "<spirit:vendorExtension xmlns:spirit=\"http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009\" xmlns:soc=\"http://www.agnisys.com\"><soc:version spirit:num=\"aiyush\"/></spirit:vendorExtension>";
designID = getDesignID(True)
print ("Design ID is: ",designID)
venExt = getVendorExtensions(designID)
print ("Before Design Vendor Extensions Modification: ", venExt)
CompInstID = getDesignComponentInstanceIDs(designID)
print ("Comp Instance ID is: ",CompInstID)
for ID in CompInstID:
   venExt = getVendorExtensions(ID)
   print ("Before Component Instance Vendor Extensions Modification: ", venExt)
   flag = setVendorExtensions(ID, myext)
   print ("Vendor Extensions of Component Instance Set: ", flag)
flag = setVendorExtensions(designID, myext)
print ("Vendor Extensions of Design Set: ", flag)
venExt = getVendorExtensions(designID)
print ("After Des
ign Vendor Extensions Modification: ", venExt)

Here,

  • getDesignComponentInstanceIDs()gets the Design listed in the file.
  • getvendorextensions()retrieves existing vendorExtensions for a component.
  • setvendorextensions()updates the vendorExtensions with your changes.
Before Modifying Vendor-Extension
<spirit:design xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:xs="http://www.w3.org/2001/XMLSchema" xmlns:ids="http://www.agnisys.com/">
      <spirit:vendor>Agnisys</spirit:vendor>
      <spirit:library>mixed_signal</spirit:library>
      <spirit:name>SS_design</spirit:name>
      <spirit:version>1.0</spirit:version>
      <spirit:componentInstances>
              <spirit:componentInstance>
                      <spirit:instanceName>inst1</spirit:instanceName>
                      <spirit:componentRef spirit:vendor="Agnisys" spirit:library="mixed_signal" spirit:name="Initiator1" spirit:version="1.0"/>
              ...
              ...
              ...
              ...
</spirit:componentInstances>
<spirit:adHocConnections>
              <spirit:adHocConnection>
                      <spirit:name>wire_inst4_P_P_0_0_logic_inst_A_inst1_A</spirit:name>
                      <spirit:internalPortReference spirit:componentRef="inst1" spirit:portRef="A"/>
                      <spirit:internalPortReference spirit:componentRef="inst4_P_P_0_0_logic_inst" spirit:portRef="A"/>
              </spirit:adHocConnection>
              ...
              ...
              ...
              ...
              ...
      </spirit:adHocConnections>
</spirit:design>
After Modifying Vendor-extension
<?xml version="1.0" encoding="UTF-8"?>
<spirit:design xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:xs="http://www.w3.org/2001/XMLSchema" xmlns:ids="http://www.agnisys.com/">
      <spirit:vendor>Agnisys</spirit:vendor>
      <spirit:library>mixed_signal</spirit:library>
      <spirit:name>SS_design</spirit:name>
      <spirit:version>1.0</spirit:version>
      <spirit:componentInstances>
              <spirit:componentInstance>
                      <spirit:instanceName>inst1</spirit:instanceName>
                      <spirit:componentRef spirit:vendor="Agnisys" spirit:library="mixed_signal" spirit:name="Initiator1" spirit:version="1.0"/>
              ...
              ...
              ...
              ...
</spirit:componentInstances>
<spirit:adHocConnections>
              <spirit:adHocConnection>
                      <spirit:name>wire_inst4_P_P_0_0_logic_inst_A_inst1_A</spirit:name>
                      <spirit:internalPortReference spirit:componentRef="inst1" spirit:portRef="A"/>
                      <spirit:internalPortReference spirit:componentRef="inst4_P_P_0_0_logic_inst" spirit:portRef="A"/>
              </spirit:adHocConnection>
              ...
              ...
              ...
              ...
              ...
      </spirit:adHocConnections>  
      <spirit:vendorExtensions>
              <spirit:vendorExtension xmlns:soc="http://www.agnisys.com">
                      <soc:version spirit:num="aiyush"/>
              </spirit:vendorExtension>
      </spirit:vendorExtensions>
</spirit:design>

Conclusion:

To summarize, the enhanced IDS-Integrate tool enables seamless handling of 3rd party vendorExtensions in IP-XACT files. With its robust capabilities, users can efficiently read, modify, and generate customized extensions, streamlining their design and verification workflows. Whether you’re adapting existing files or creating entirely new ones, IDS-Integrate ensures a smooth and powerful process.

Agnisys PSS VSCode Extension and Compiler

Sudhir Bisht & Radhey
Introduction

The Agnisys PSS (Portable Stimulus Standard) Extension for Visual Studio Code is a game-changer for hardware verification engineers, streamlining the development of sophisticated verification scenarios. Built around the Portable Stimulus Standard (PSS) defined by Accellera, this extension enables efficient, scalable, and reusable test scenarios for system-on-chip (SoC) designs across various abstraction levels.

Packed with features like real-time validation, syntax highlighting, error detection, and intelligent suggestions, the Agnisys PSS Extension significantly accelerates verification workflows while enhancing robustness.

The Portable Test and Stimulus Standard (PSS) itself is a revolutionary approach to creating reusable and adaptable stimulus and test scenarios. It provides powerful constructs for modeling data flows (buffers, streams, states), behaviors (actions, activities, resources), constraints, randomization, and coverage. This versatility makes PSS an indispensable tool for generating high-level test scenarios in modern SoC design. Agnisys extends the capabilities of PSS with its Agnisys PSS Compiler (APC), which introduces new functionalities such as defining registers and sequences with Read-Only, Read-Write, and Write-Only access types. This streamlined compiler enhances the precision and efficiency of verification and validation processes, enabling engineers to address diverse user requirements with unmatched flexibility.
Key Features of PSS VSCode Extension:
  • Real-Time Validation: Instantly detects syntax and structural errors, helping resolve issues as you type.
  • Syntax Highlighting: Improves readability of complex PSS models by visually distinguishing elements.
  • Intelligent Hinting and Auto-Completion: Context-aware suggestions accelerate coding and reduce errors.
  • Error Highlighting: Flags syntax and semantic issues with detailed descriptions for quick fixes.
  • Constraint and Scenario Checking: Identifies conflicts and ensures proper scenario definitions.
  • Code Snippets: Predefined templates for common PSS constructs enhance productivity.
  • Tool Integration: Supports external PSS tools for seamless validation and execution.
  • Project Management: Simplifies organization and navigation of large PSS projects.
Benefits:
  • Faster and error-free PSS development with real-time feedback and intelligent features.
  • Improved code readability, maintainability, and collaboration within teams.
  • Streamlined integration with verification workflows, reducing debugging time and enhancing productivity.
  • The Agnisys PSS Extension empowers engineers to efficiently create and manage PSS models, ensuring robust and scalable hardware verification.
Key Features of Agnisys PSS Compiler:
Simplified Sequence Definition APC allows users to define PSS sequences for interacting with specific bit fields of registers. These sequences can range from simple read and write operations to complex scenarios involving conditional expressions, loops, and more.
Automated Output Generation
A single PSS sequence specification can be compiled into diverse outputs for multiple domains, including:
  • UVM Sequences:For verification.
  • SystemVerilog Sequences:For validation.
  • C Code:For firmware and device driver development.
  • Specialized Formats:For Automated Test Equipment (ATE).
Additionally, APC generates user-friendly HTML documentation and flowcharts, aiding communication and understanding across teams. Unified Specification Framework APC promotes portability and reuse through its support for sequence definition in various formats, including PSS, Python, spreadsheets, and GUI interfaces. Sequences derived from a golden specification ensure consistency and accuracy across different domains. Comprehensive Sequence Constructs The compiler supports advanced constructs such as loops, if-else statements, wait commands, and switch cases. These features enable dynamic sequence creation and address complex scenarios like variations in encoding formats, time-unit differences, interface changes, and error handling. Enhanced Randomization and Constrained Testing By facilitating randomized and constrained sequences, APC ensures robust testing scenarios. It effectively handles complex cases, such as indirect and interrupt registers, ensuring thorough validation and increased verification coverage. Firmware Development Enablement APC provides firmware engineers with tools to write and debug device drivers and application software using sequences derived from the same specification. This capability bridges the gap between hardware verification and software development. Integration of SystemRDL with PSS To generate a complete and accurate system model, PSS 2.0 leverages the complementary strengths of SystemRDL and PSS:
  • SystemRDL:Focuses on capturing detailed structural aspects of the system, including register characteristics and properties.
  • PSS:Defines the dynamic behavior of the system, including sequences that outline the steps and actions to be executed.
Users can describe the Register Definition in system RDL and sequences in PSS . This integration enables users to capture both static register-level details and dynamic system-level operations, resulting in a unified representation that enhances design accuracy and completeness. Benefits of Agnisys PSS Compiler
  1. Efficiency and Precision:
    • Streamlined processes for defining and automating register and sequence operations.
    • Simplifies complex testing scenarios, enhancing team efficiency.
  2. Comprehensive Outputs:
    • Generates diverse outputs, including UVM, SystemVerilog, C code, and ATE formats.
    • Produces detailed HTML documentation and flowcharts for improved team collaboration.
  3. Advanced Testing Constructs:
    • Supports loops, conditional logic, and error handling mechanisms.
    • Facilitates randomized and constrained testing for robust validation.
  4. Portability and Reuse:
    • Promotes consistency and accuracy across domains through unified sequence definition.
  5. Accelerated Development Cycles:
    • Automates exhaustive testing, reducing development time and minimizing errors.
Conclusion

The Agnisys PSS Compiler and VS Code Extension together provide a powerful solution for hardware verification engineers and SoC design teams. By leveraging the latest advancements in PSS 2.0, these tools streamline sequence generation, enable diverse output formats, and integrate seamlessly with SystemRDL, reducing development cycles and enhancing verification coverage.

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