Events Articles
How We Deliver Streamlined Design Automation Solutions in Response to Industry’s Need to Do More with Less
The current state of the electronics industry is placing ever increasing demands on your design, verification, and validation teams to do more with less.
A Quick Look Back at a Virtual DAC
Recapping a virtual event where new solutions were unveiled.
Adopting New Methods For Faster Development Of RISC-V based SoCs
Explore Accelerated RISC-V SoC Development in Our Blogs. Stay Ahead in Semiconductor Tech. Unleash Innovation! Accelerated RISC-V SoC Development.
Most Popular Posts
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Creating Test Sequences for RISC-V Cores and SoCs -
How We Deliver Streamlined Design Automation Solutions in Response to Industry’s Need to Do More with Less -
Not your Average UVM Testbench Generator – Unveiling at DAC 2019 -
Setting the Stage for the Next Abstraction -
Register Automation using Machine Learning -
Repurposing von Neumann Architecture with SRAM-based Register File
Creating Test Sequences for RISC-V Cores and SoCs
By Louie De Luna, Agnisys Chief Product Evangelist The idea of an open-source CPU core was virtually unheard-of ten years ago – let alone using it.
Repurposing von Neumann Architecture with SRAM-based Register File
By Louie De Luna, Agnisys Chief Product Evangelist The conventional von Neumann architecture has been the workhorse of computing for several decades.
Not your Average UVM Testbench Generator – Unveiling at DAC 2019
By Louie De Luna, Agnisys Chief Product Evangelist Being so immersed in the work & technology, it’s easy to forget where we are in this tech revolution.
EDA Is Advancing – but Where Are the Women?
1981 marked the beginning of EDA as an industry. Within a few years there were many companies specializing in EDA, each with a slightly different emphasis.
Setting the Stage for the Next Abstraction
Using abstraction, designers are able to focus on the high-level design & tests while the tools took care of the automation at the low-level.
Register Automation using Machine Learning
By Louie De Luna, Agnisys Director of Sales and Marketing Right after Google’s AlphaGo system defeated a human Go world champion in 2015. Visit now.
Out of the Office – Lessons from a client visit in Edinburgh
Discover the magic of Edinburgh, Scotland's capital, through a professional's perspective. Explore its beauty, culture, and reflection on meaningful trip.
Making Way For Register Specification Software
Optimize semiconductor design with register specification software, streamlining development processes. Enhance efficiency and quality.
The Ultimate Shift Left
Einstein's wisdom meets semiconductor innovation: Shift left with specification-driven design for flawless results. Explore Agnisys' solutions.
2015 Year End review – DV Challenges
Agnisys reflects on a successful 2015, highlighting partnerships, events, and product innovations in the semiconductor industry.
Musings from ARM TechCon Santa Clara 2015
Explore Agnisys' debut at ARM TechCon, connecting with SoC engineers, showcasing innovative technology, and addressing industry pain points.
Does UVM sometimes make you feel stupid?
Explore UVM complexities and solutions on Agnisys' blog. Don't let UVM make you feel stumped; find clarity and insights here.
Electronic Design Automation Trade Show Update – 52DAC
Stay informed on the latest innovations in electronic design at the 52nd DAC trade show. Explore cutting-edge EDA solutions and trends.
Automatic Register Verification Gains Acceptance at DAC
Uncover the future of hardware design with ARV formal methodology. Elevate your reliability and accuracy. Explore now.
Semiconductor Register Specification: Shadow of a Shadow
Explore challenges in semiconductor register specification & solutions like IDesignSpec tool for versatile register data management discussed at DVCon.
DVCon Europe Needs Automatic Register Verification and Generation
Explore the need for automatic register verification generation at DVCon Europe. Dive into our insightful blog for innovative solutions. Learn more now!
DVCon India takes off!
Explore the highlights of DVCon India - a premier conference on design and verification, featuring cutting-edge insights and innovation. Learn more!
Getting Ready for DVCon India 2014
Join us for the exciting launch of ARV at DVCon India 2023! Explore innovative products and engage with industry leaders.
DVinsight: Universal Verification Methodology IDE at DAC Day 3
Ending the last day of DAC strong with a presentation of DVinsight, a Universal Verification Methodology IDE The highlight of the last day at DAC.
DAC Day 2: System On Chip Design Challenges Addressed by Agnisys
Discover how Agnisys products tackle System on Chip design challenges at DAC Day 2. Stay updated on cutting-edge semiconductor solutions.
DAC Day 1: Universal Verification Methodology Adoption
The first day of the DAC for Agnisys was exciting. We experienced a higher traffic than during previous years.
In preparation for DAC 2014
Join us at DAC for exciting tech launches, prizes, and the Agnisys Glory Games! Get the scoop on DVinsight and more.
EDA Companies must Collaborate or Die
Discover why collaboration is imperative for EDA companies to thrive in a rapidly evolving industry. Explore insights on the Agnisys blog.
Using IVerifySpec to test IDesignSpec
IDesignSpec generates several outputs from a single spec, evolving into an executable spec tool for digital design. Here's how we ensure its quality.
IDesignSpec Provides Complete Register Design Automation
Discover iDesignSpec, the ultimate register design automation solution. Streamline your semiconductor design process with Agnisys. Learn more now!
Agnisys makes Design Verification process extremely efficient!
Discover how Agnisys revolutionizes design verification, enhancing efficiency in the process. Explore our blog for insights and solutions.
Customer’s Music and DVCon 2012
The buck stops at the CEO. DVCon 2012 happenings from our perspective.
Age of cooperation, is it?
Driving EDA Industry Collaboration for Productivity & Innovation - Accellera, Cadence, & Agnisys Partnership.