Streamlined Design Automation Solutions
February 25, 2023

How We Deliver Streamlined Design Automation Solutions in Response to Industry’s Need to Do More with Less

The current state of the electronics industry is placing ever increasing demands on your design, verification, and validation teams to do more with less.

A Quick Look Back at a Virtual DAC
August 4, 2020

A Quick Look Back at a Virtual DAC

Recapping a virtual event where new solutions were unveiled.

New Methods For Faster Development
December 9, 2019

Adopting New Methods For Faster Development Of RISC-V based SoCs

The growth of new technologies such as artificial intelligence, machine learning, Internet of Things (IoT), virtual/augmented reality and of course, the various technologies for the automotive industry has led to a new ...

Creating Test Sequences for RISC-V Cores and SoCs
October 7, 2019

Creating Test Sequences for RISC-V Cores and SoCs

By Louie De Luna, Agnisys Chief Product Evangelist The idea of an open-source CPU core was virtually unheard-of ten years ago – let alone using it for commercial applications. The CPU core has been the most critical ...

Repurposing von Neumann Architecture with SRAM-based Register Files
August 11, 2019

Repurposing von Neumann Architecture with SRAM-based Register Files

By Louie De Luna, Agnisys Chief Product Evangelist The conventional von Neumann architecture has been the workhorse of computing for several decades, but with the advent of AI applications and big data the entire ...

Not your Average UVM Testbench Generator
May 20, 2019

Not your Average UVM Testbench Generator – Unveiling at DAC 2019

By Louie De Luna, Agnisys Chief Product Evangelist Being so immersed in the work and technology, it’s easy to forget where we are in this technological revolution. Some of us didn’t really appreciate the impact of the ...

EDA Is Advancing
April 15, 2019

EDA Is Advancing – but Where Are the Women?

1981 marked the beginning of EDA as an industry. Within a few years there were many companies specializing in EDA, each with a slightly different emphasis.

Setting the Stage for the Next Abstraction
March 26, 2019

Setting the Stage for the Next Abstraction

Using abstraction, designers are able to focus on the high-level design & tests while the tools took care of the automation at the low-level.

Register Automation using Machine Learning
February 17, 2019

Register Automation using Machine Learning

By Louie De Luna, Agnisys Director of Sales and Marketing Right after Google’s AlphaGo system defeated a human Go world champion in 2015, the hype of deep learning and machine learning (ML) was quickly assimilated into ...

Out of the Office
August 24, 2018

Out of the Office – Lessons from a client visit in Edinburgh

As we travel professionally, sometimes we tend to miss some of the scenery along the way. We can get a bit of tunnel vision as we busy ourselves with client meetings, conferences, socializing with potential new clients, ...

Making Way For Register Specification Software
May 5, 2016

Making Way For Register Specification Software

While more registers means more functionality and configurability, more is not always better. No one gives much thought to the heating, ventilation and air conditioning registers in the house–typically, two in each ...

The Ultimate Shift Left
April 11, 2016

The Ultimate Shift Left

Important observations from Einstein and New England’s ice traders.. Albert Einstein defined it well: “Insanity is doing the same thing over and over again and expecting different results.” I have come across several ...

2015 Year End review
December 30, 2015

2015 Year End review – DV Challenges

Wow what a marvelous year 2015 has been to Agnisys, with full of events at the various technical exhibitions, new customers, new features and new products and not to forget – new partnership. It would be unfair to say ...

Musings from ARM TechCon Santa Clara 2015
December 9, 2015

Musings from ARM TechCon Santa Clara 2015

The first day for exhibitors had lots of foot-traffic. Mostly casual onlookers, but a few who were genuinely interested in Agnisys. Since it was our first foray into ARM TechCon, it was good to meet new set of ...

Does UVM sometimes make you feel stupid?
September 21, 2015

Does UVM sometimes make you feel stupid?

Somewhere in the deep trenches of a UVM based verification project, an engineer teeters on the verge of insanity. As the saying goes, the faint of heart need not attempt UVM based verification. But what makes it so ...

Electronic Design Automation Trade Show Update – 52DAC
June 27, 2015

Electronic Design Automation Trade Show Update – 52DAC

Overheard a lot of talk about “Shift Left” – which refers to the higher levels of abstraction leading to higher levels of productivity. I find that interesting as we at Agnisys have been doing this left shift since ...

Automatic Register Verification Gains Acceptance at DAC
June 14, 2015

Automatic Register Verification Gains Acceptance at DAC

With the Design Automation Conference wrapping up this week in San Francisco, there is one thing we can say for sure – Automatic Register Verification (ARV) gains acceptance with design and verification teams. Last ...

Semiconductor Register Specification
March 4, 2015

Semiconductor Register Specification: Shadow of a Shadow

So we have been working in the register specification space for a long time. We came out with the IDesignSpec tool around 2010. Five years of constant refinement and evolution based on the customer feedback has created ...

DVCon Europe Needs Automatic Register Verification and Generation
October 30, 2014

DVCon Europe Needs Automatic Register Verification and Generation

I feel like a bumblebee, going from the DVCon in US, to the next one in India to then to Europe.  All this cross-pollination is exciting and enriching when experiencing the needs of the Semiconductor design engineers ...

DVCon India takes off
September 26, 2014

DVCon India takes off!

DVCon had a solid start in Bangaluru, India.  The audited attendee numbers will be coming in later, but we believe we had approximately 425+ delegates. That is truly amazing for the first year of the event! For me, it ...

Getting Ready for DVCon India 2014
September 24, 2014

Getting Ready for DVCon India 2014

It is penultimate day – the day before the big event! Preparing and launching the first ever DVCon India event feels like taxiing a plane down the runway, ready to take off.  It is new; the design was replicated from ...

Presenting DVinsight
June 5, 2014

DAC Day 3: Presenting DVinsight, Universal Verification Methodology IDE

Ending the last day of DAC strong with a presentation of DVinsight, a Universal Verification Methodology IDE The highlight of the last day at DAC was my presentation at the verification academy booth.  I presented ...

System On Chip Design Challenges Addressed by Agnisys
June 4, 2014

DAC Day 2: System On Chip Design Challenges Addressed by Agnisys

System on Chip Design Challenges – The Highlight of DAC Day 2 It was a very busy day for Agnisys on the second day of the Design Automation Conference. On day two, we learned how much our products address System on Chip ...

Universal Verification Methodology Adoption
June 3, 2014

DAC Day 1: Universal Verification Methodology Adoption

The first day of the DAC for Agnisys was exciting.  We experienced a higher traffic than during previous years.

In preparation for DAC 2014
May 8, 2014

In preparation for DAC 2014

As an EDA company our development cycle seems to revolve around DVCon and DAC. This year DVCon and DAC came fairly close together. I feel, we just finished DVCon and now we are preparing for DAC. Come to think of it, ...

EDA Companies must Collaborate or Die
September 10, 2013

EDA Companies must Collaborate or Die

Recently at the sidelines of DAC, Anupam Bakshi, CEO of Agnisys, Inc. sat down with Karen Bartleson, Director of Community Marketing at Synopsys to discuss a very important topic that is close to the heart of the ...

Using IVerifySpec to test IDesignSpec
May 28, 2013

Using IVerifySpec to test IDesignSpec

IDesignSpec generates several outputs from a single spec, evolving into an executable spec tool for digital design. Here's how we ensure its quality.

Complete Register Design Automation
May 28, 2013

IDesignSpec Provides Complete Register Design Automation

Published on 05-19-2013 07:30 PM in Semiwiki It goes without saying that registers play a vital role in designing any ASIC, FPGA, SoC or System. In today’s world, while designing SoC with multiple IPs and ...

Agnisys makes Design Verification process extremely efficient
May 28, 2013

Agnisys makes Design Verification process extremely efficient!

Agnisys Inc. was established in 2007 in Massachusetts, USA, with a mission to deliver innovative automation to the semiconductor industry. The company offers affordable VLSI design and verification tools for SoCs, FPGAs ...

Customer’s Music and DVCon 2012
March 14, 2012

Customer’s Music and DVCon 2012

The buck stops at the CEO. DVCon 2012 happenings from our perspective.

Age of cooperation, is it?
November 24, 2010

Age of cooperation, is it?

It's heartening to see greater cooperation between various EDA companies, both big and small. The ongoing work under Accellera for UVM, UCIS and IP-XACT is testament to this fact.  It is often bemusing to see the push ...