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One Specification. All Teams. Every Deliverable.

Golden Specification–Driven Collaboration Platform for IP and SoC Development

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  • 1 GOLDEN SPECSingle source of Truth
  • 6 AI AGENTSExpert, Customizable, Retentive Agents
  • 1 PLATFORMWindows · Linux · MacOS
Block
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Register
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Design (RTL)
Verification
Software / firmware
Documentation
Standards and custom
Valid

Chip, block, register, field. One spec, one window, light or dark mode.

The synchronization problem, solved at the source

Design RTL, UVM testbenches, firmware headers and documentation are usually written by different teams from different copies of the spec: Word files, spreadsheets, PDFs. When the spec changes, the copies drift apart, and the mismatch surfaces late in verification or integration, when fixes are most expensive.

IDS-CF™ (IDesignSpec Collaboration Framework) puts all teams on a single Golden Specification. Author it once, validate it with AI, and generate RTL, verification collateral, software headers and documentation from it, so every output stays consistent with the spec.

On top of the platform, IDS-AI™ adds a multi-agent AI layer that checks, extracts, generates and debugs from the Golden Specification, and IDS-MCP™ lets your own AI assistant drive the IDS toolchain in plain language.

Author it. Automate it. Ask for it.

  • THE PLATFORM

    IDS-CF

    Author, collaborate, generate

    • Four interchangeable spec editors
    • Multi-team authoring and version history
    • One-click generation of RTL, UVM, software and docs

  • THE AGENTS

    IDS-AI

    Multi-agent AI on the Golden Spec

    • Spec Check, Extract
    • Verification, SV Assertion, RTL Generator, Debug
    • Runs on the IDS-CF platform

  • THE INTERFACE

    IDS-MCP

    Your AI assistant, connected

    • Works with Claude, Cursor, Cline and more
    • Generation, verification and integration by prompt
    • Offline documentation and flag search

Author the spec the way your team already thinks

Four interchangeable views edit the same underlying specification. Switch freely without ever forking the source of truth.

See it live in a demo →

  • Structured, form-driven authoring for chips, blocks, registers and fields.

  • Tabular editing of registers and fields, familiar to hardware and verification engineers.

  • Hierarchical browsing of the full chip → block → register → field tree.

  • VS Code like editing with syntax highlighting, auto-completion and real-time validation.

One golden specification, every deliverable

IDS-CF produces the following from the single Golden Specification:

  • Design (RTL)

    Verilog, VHDL, SystemVerilog and SystemC

  • Verification

    UVM RAL, Automatic and Custom sequences, Formal Assertions and UVM testbench

  • Software / firmware

    C/C++ headers, sequence API, C-tests and environment

  • Documentation

    Interactive HTML, PDF, Programmer’s Reference Manual (PRM), Word, Markdown, JSON, 2DReg and MemDump

  • Standards and custom

    IP-XACT, SystemRDL, Velocity-template custom outputs, and Perl and Python dumps

Golden Specification–driven chip sign-off with agentic AI

IDS-AI is a multi-agent layer that runs on the IDS-CF platform. Every agent works from the same Golden Specification, so the output of one agent is the trusted input of the next.

See IDS-AI

See it live in a demo →

SpecCheck Agent
Checks the spec for correctness, completeness, consistency and AI-readiness before anything is generated, so errors are caught at the cheapest point to fix them.
Extract Agent
Converts unstructured PDF, text, HTML and Markdown into structured, machine-readable design information that becomes part of the Golden Specification.
RTL Generator Agent
Generates Verilog, SystemVerilog and VHDL, and handles SoC assembly and integration from connectivity information.
Verification Agent
Creates the entire verification environment (monitors, drivers and sequences) along with the sequences to drive coverage toward 100%. Custom sequences are captured through GUI templates.
SV Assertion Agent
Generates SystemVerilog Assertions and the formal verification environment for assertion-based testing.
Summary / Debug Agent
Summarizes design specifications, identifies errors and inconsistencies, and helps debug issues for faster SoC development.

Ask your AI assistant. Run the IDS toolchain.

IDS-MCP is a pair of self-contained server binaries that link your AI programming assistant directly to the IDesignSpec toolchain. Supported assistants include Claude Desktop, Claude Code, Cursor, Cline, Open WebUI and custom agent platforms.

  • ids-mcp-suite

    Generation, verification and integration

    Choose this to build

    • Generate synthesizable RTL (Verilog, SV, VHDL)
    • Generate UVM RAL, C/C++/SV headers, docs and IP-XACT
    • Validate register specs (check_spec)
    • Scaffold and simulate ARV-Sim (UVM) environments
    • Scaffold and run ARV-Formal assertions
    • Run and validate IDS-Integrate SoC connectivity specs
    • Requires idsbatch and an active Agnisys license

  • ids-mcp-docs

    Offline knowledge engine and flag search

    Choose this to learn and look up

    • Instant, deterministic flag lookup and syntax help for idsbatch
    • Semantic search across hundreds of embedded Agnisys guides (IDS-Batch, IDS-Verify, IDS-Validate, IDS-Integrate)
    • Answers architecture, configuration and syntax questions offline
    • Standalone: no idsbatch install, no license

No need to memorize command-line flags. Ask your assistant in plain language.

Built for how spec-driven teams actually work

Single Golden Specification
One source of truth across architecture, RTL, firmware, software, verification, validation and documentation.
AI-assisted validation
Checks completeness, consistency and correctness of the spec so issues surface before implementation begins.
Collaborative authoring
Multiple teams author, review and manage the same specification in one project environment.
Multi-format import
Imports IDS-Word, IDS-Excel, YAML, IP-XACT, SystemRDL, custom CSV and other formats, for migration and design reuse.
VS Code–compatible editor
Syntax highlighting, auto-completion, property hints, real-time validation, linting, semantic checks and error reporting.
Interactive HTML documentation
Searchable, filterable and fully navigable, with hierarchical views, hyperlinks and cross-references.
Project, version and history
Tracks revisions and generation history, giving complete engineering traceability.
Cross-platform
Runs on Windows, Linux and macOS.
IDesignSpec ecosystem
Integrates with IDS-Integrate™, IDS-Verify™, IDS-Validate™, IDS-NoC™ and IDS-AI™ for a complete specification-driven design and verification flow.

What changes on the ground

Catch spec bugs before they become silicon bugs.
AI-assisted validation finds specification issues before RTL, where fixes cost the least.
No manual synchronization.
When the spec changes, RTL, UVM RAL, headers and documentation are regenerated from the same source, not rewritten by hand.
Faster turnaround, lower cost.
Automated generation and collaboration cut specification turnaround, rework and late-stage design changes.
End-to-end traceability.
Follow a requirement from the specification through implementation, verification, documentation and release.
Scales with your program.
From a single IP block to a multi-team SoC, with the same standardized workflow.

Create Once. Validate with AI. Generate Everything.

See it in a live demo

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