Agnisys: Pioneers in Specification Automation and Beyond

In the ever-accelerating landscape of technological advancement, Agnisys has emerged as a trailblazer, reshaping the electronic design automation (EDA) industry with its cutting-edge solutions. At the forefront of our transformative offerings is the Agnisys IDesignSpec Suite, a testament to our commitment to innovation, efficiency, and a future where specification automation goes hand in hand with seamless collaboration.

Revolutionizing Specification Management

The cornerstone of Agnisys success lies in our visionary approach to specification management. Traditionally, the process of translating design specifications into the development phase has been plagued by challenges arising from a lack of automated links. Designers manually crafted register transfer level (RTL) code, embedded programmers manually composed C/C++ code, and verification teams independently coded testbenches and tests, all based on the same specification. This manual and disjointed approach led to ambiguity, with different teams having varied interpretations of the natural language specification. Unsurprisingly, this often resulted in inconsistencies, and a significant portion of the project was dedicated to resolving bugs born out of these discrepancies.

Impact of Specification Changes: A Continuous Cycle of Challenges

The nature of projects dictates that specifications undergo numerous changes throughout their lifecycle. However, each specification alteration triggered a repetitive cycle in the development process. Teams had to manually interpret and update their respective code, leading to inevitable inconsistencies and, consequently, an arduous debugging process. The toll on schedule time and project resources proved to be exorbitant.

Executable Specifications: Agnisys Methodology’s Timely Intervention

Enter Agnisys, introducing a methodology that tackles the specification to design quandary head-on. In the Agnisys approach, many specifications can be articulated in executable formats. These formats serve as the foundation from which our tools seamlessly generate design, programming, verification, validation, and documentation files. The transformative aspect lies in the agility introduced by these executable specifications. Every time a specification undergoes a change, all associated files are automatically regenerated, incorporating the modifications. This automated process not only alleviates the burden of manual effort but also ensures that all teams remain in sync throughout the development lifecycle.

Key Benefits of Executable Specifications

Time Savings: The automated regeneration of files in response to specification changes significantly reduces the time spent on manual updates. This agility is particularly crucial in fast-paced development environments.

Error Reduction: By automating the generation process, the likelihood of inconsistencies and errors stemming from manual interpretations and updates is drastically reduced. This, in turn, minimizes the time and resources spent on debugging.

Consistency Across Teams: Executable specifications act as a single source of truth, ensuring that all teams, including designers, programmers, and verification engineers, are working from a synchronized and consistent set of specifications. This coherence is invaluable in avoiding the pitfalls of misinterpretation.

The Agnisys Methodology in Action

Using the Agnisys solution suite, users can define a design hierarchy that includes a chip, block, memory, register group, register, and field. All these components have different attributes such as custom name, address, bits, size, default value, accesses, etc. An executable specification has the capability of capturing all such functionality along with output specific requirements, such marking a register as interrupt, counter, alias, shadow, lock, etc. for RTL output and hdl_path, coverage, constraint, or class name, formats for UVM RAL output. Similarly, with the help of predefined properties applied in the specification, other behavior of an IP or register can be specified.

The specification can be captured in a template-based approach provided in different flavors of IDesignSpec GDI or text based formats including industry standards such as SystemRDL or IP-XACT. Various outputs can be generated from these specifications automatically as described below with the help of a GUI-based generator or command line generator.

In the Agnisys methodology, the tangible impact of executable specifications unfolds across various phases of development:

Design Generation: The specifications are automatically translated into RTL designs, covering Verilog, VHDL, and SystemC, providing a foundation for the subsequent design stages.

Code Generation: C/C++ code is automatically generated based on the executable specifications, eliminating manual coding efforts and the errors associated with them.

Verification and Validation: SystemVerilog files compliant with the Universal Verification Methodology (UVM) are generated, ensuring a standardized and efficient verification process.

Documentation: HTML, PDF, Markdown, Json, and DITA documentation formats are automatically generated, capturing the project details accurately and consistently.

Beyond File Generation: Enhanced Interoperability and Safety Standards Compliance

We pride ourselves on our unwavering commitment to industry standards, incorporating them into every facet of our products. This commitment goes beyond mere file generation, encompassing enhanced interoperability and strict compliance with safety standards. The Agnisys IDesignSpec Suite stands as a testament to this dedication, offering a comprehensive solution that aligns with the highest safety benchmarks within the industry.

RTL Designs and Bus Standards

Agnisys dedication to interoperability is evident in the diverse set of RTL designs our solution generates. These designs span Verilog, VHDL, and SystemC, ensuring compatibility with a wide range of industry-standard hardware description languages. Additionally, the suite provides interfaces for a comprehensive array of bus standards, including APB, AHB, AHB-Lite, AXI-Lite, AXI4, AXI4-Lite, TileLink, Avalon, and Wishbone. This broad support ensures seamless integration with various design environments, enabling engineers to work with their preferred tools.

Standard IP Blocks Generation

The suite goes beyond basic design elements, also generating standard IP blocks critical for accelerated development. These blocks include, but are not limited to, AES (Advanced Encryption Standard), DMA (Direct Memory Access), GPIO (General Purpose Input/Output), I2C (Inter-Integrated Circuit), I2S (Inter-IC Sound), PIC (Peripheral Interface Controller), PWM (Pulse Width Modulation), SPU (Sound Processing Unit), Timer, and UART (Universal Asynchronous Receiver-Transmitter). By automating the creation of these blocks, Agnisys empowers designers to focus on the unique aspects of their projects while ensuring adherence to established standards.

Verification and Validation Excellence

In the realm of verification and validation, We maintain a meticulous approach. Verification and validation files are generated in SystemVerilog, adhering to the Universal Verification Methodology (UVM). This standardized approach not only streamlines the verification process but also ensures compatibility with widely adopted industry practices. The suite’s output is designed to seamlessly integrate into existing verification environments, promoting efficiency and consistency across projects.

Fully Standard-Compliant Code Generation

The generated C/C++ code by the IDesignSpec Suite stands out for its full compliance with industry norms. Adhering to established coding standards, this automated code generation process reduces the likelihood of errors and accelerates the programming phase. The suite’s code output is structured, well-documented, and optimized for readability, facilitating collaboration among development teams and easing the maintenance of codebases.

Comprehensive Documentation Support

Recognizing the pivotal role of documentation in the design process, Agnisys ensures versatility in its documentation output. The suite generates documentation in multiple formats, catering to diverse preferences and project requirements. Whether it’s HTML, PDF, Markdown, Json, or DITA, engineers can access and contribute to project documentation in their preferred format, promoting effective knowledge sharing and collaboration.

Support for Diverse File Formats and Customization

Agnisys extends its support beyond conventional formats, embracing diversity in file types. SystemRDL, IP-XACT, YAML, JSON, RALF, and CSV are among the supported formats, providing flexibility in data exchange and compatibility with various toolchains. Moreover, customization scripts, leveraging standard Tcl, Python, and Velocity scripting languages, can be seamlessly integrated. This extensibility empowers users to tailor the suite’s functionality to their specific project needs, enhancing adaptability and promoting a more personalized user experience.

Safety Standards Certification

Agnisys has achieved a significant milestone by obtaining certification for its IDesignSpec Suite, emphasizing its commitment to excellence and safety. The suite’s adherence to the stringent safety standards outlined in ISO 26262 and IEC 61508 underscores not only the innovative nature of its solutions but, more crucially, their alignment with the highest safety benchmarks established within the industry. This certification provides confidence to users that the IDesignSpec Suite is not only a cutting-edge design automation tool but also meets the rigorous safety requirements necessary for critical applications.

Conclusion

In conclusion, Agnisys innovative methodology, driven by executable specifications, not only addresses traditional challenges but transforms the entire landscape of electronic design. With a focus on time savings, error reduction, and consistency across teams, We are redefining how teams collaborate and innovate across the development lifecycle. As specifications evolve, We ensure that change is an opportunity for seamless adaptation and progress. In the dynamic world of electronic design, Agnisys continues to stand as a trailblazer, charting a new course in specification management and design automation.