SEMICONDUCTOR DESIGN AND VERIFICATION ARTICLES
A recent blog post noted that today’s RTL design verification (DV) environments are very powerful and very complex. The SystemVerilog-based...
Over the last couple of months, I have discussed some key recent additions to the Agnisys solutions for system-on-chip (SoC)...
Overview Electronics in general, and embedded systems in particular, become more critical every day. There is hardly a single aspect...
In the realm of semiconductor development, often characterized by its pioneers, cowboys, shootouts, gamblers, and gunslingers, one might be tempted...
A couple of years back at the Design Automation Conference (DAC), as I strolled through the exhibit floor, I couldn’t...
Most of us have faced difficulties in our personal and professional lives, and have worked our way through them. But...
Agnisys just released DVInsight-Pro version 2.0 with many new features that enable much more productive SV/UVM code development. Do you...
Ask a bunch of engineers about the Universal Verification Methodology (UVM) and you’ll hear two distinct sets of responses, sometimes...
The last month has been busy for all of us at Agnisys, with three important virtual events. As I previewed...
