SEMICONDUCTOR DESIGN AND VERIFICATION ARTICLES

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Tight Generator Interface support in SoC-E

Introduction As per the IP-XACT User Guide, IP-XACT defines an API called Tight Generator Interface (TGI) to query, modify, create...

An Update on Functional Safety and ISO 26262

Just about a year ago, I published a blog post about the emerging need for better functional safety and security...

Semiconductor Data Sheet Automation – Just The Way You Want It

Moore’s law prediction about the increase in density of an SoC design continues to prove accurate with each advancement of...

Next Gen SystemRDL: Implementing Registers with IDesignSpec

Typically thousands of registers are required for today’s complex designs, which are used to control the operations of the SOC...

Automating the UVM Register Abstraction Layer (RAL)

It’s hard to think of any electronic design automation (EDA) innovation that’s had more impact than the Universal Verification Methodology...

What Every Engineer Should Know About SoC Register Generation

Register Generation is a Must-Have Capability Today’s SoC designs contain several thousands of registers and memory map elements. The design...

How to Automatically Generate Better IC Design Registers

There is probably no component more ubiquitous across integrated circuit (IC) and intellectual property (IP) designs than registers. Addressable registers...
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