IDSNextGen™ is a multi-platform product which helps user to create SoC specification at an enterprise level. It handles individual IP to sub-system to SoC level and is compatible with Word ,Excel, IP-XACT, RALF, CSV, System RDL. IDSNextGen generates design and verification code for not just registers but sequences in one integrated environment. It reduces the verification time by generating the entire UVM SV and SystemC output sequences.
The IDSNextGen product attempts to “understand” the specification using Machine Learning technology and guides the user about issues with the specification. It helps create a standardized specification. Capturing issues in the specification is the extreme form of “Shift-Left” that the industry has been seeing. Agnisys motto is to stop issues from germinating in the first place so that less time is spent on the debug – which is often very costly. Once the specification is entered, user can create custom outputs using a template engine. IDSNextGen™ now supports all current prevailing input and output formats.