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Here are our most recent articles.

Automated, Faster Specification to Sign-Off with IDS-AI

We always enjoy participating in the annual DAC show, which this year was held a few weeks ago in Long...

Automatic Generation of a Network-on-Chip Interconnect

As the art of chip design began to mature, interconnecting major blocks required more than just ad hoc collections of signals...

IDS-NoC™: Scalable Interconnect for Modern SoC Design

Introduction As SoC designs continue to grow in complexity, the communication infrastructure connecting various IP blocks becomes increasingly important. Traditional...

Agnisys to Showcase Agentic AI, Network-on-Chip, and DFT Automation Breakthroughs at DAC 2026

  Agnisys will showcase IDS-AI™, IDS-NoC™, and Advance DFT Automation at DAC 2026 to accelerate chip design, improve quality, and...

How Do Our Customers Use Our Tools? Let Me Count the Ways

  In my previous blog post, I shared a few case studies of how our customers deploy our tools and...

How Do Our Customers Love Us? Let Me Count the Ways

  The title of today’s post assumes that many of you took some literature courses in college as part of...

Newsletter 2026 Q2

  As the semiconductor industry continues to push the boundaries of AI, high-performance computing, automotive, and edge applications, engineering teams...

Addressing DV Professionals’ Need to Reduce Verification Errors in Complex Designs

  There is no doubt that design verification (DV) is an engineering specialty quite distinct from hardware design. Designers write...

How System-on-Chip Design Accelerates Smarter, Smaller Devices

  The choice between designing custom chips and using standard hardware has been a factor in electronics development for many...
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