Portable Sequence Generator for Verification, Firmware & Validation
The complexity of modern SoC has raised the requirement for HW/SW co-simulation to catch the bugs from the early design stage. There is lack of common set of sequences which can be shared across the teams. ISepenceSpec helps design teams to generate the unified test and programming sequences in UVM and Firmware from the specification. ISequenceSpec uses the register information from importing the standard formats like IP-XACT, SystemRDL, XML. User can define the test sequences in a simple editor, and then generate the unified test sequences from verification to validation. The test generated are UVM sequences for simulation and firmware sequences for HW/SW co-simulation and post silicon validation like Start-up sequence, read-write operation shutdown sequence, low power mode sequence etc.
Automate the generation of code for device initialization and other important device sequences
- Simple, natural, portable sequence format for multiple IP/cores and SoC
- Capture sequences at a higher level in-sync with register specification
- Use register descriptions in standard formats like IP-XACT, SystemRDL, RALF or leverage on IDesignSpec™ integrated flow to use register data
- Simple to use, no training required
- Sequence constructs include loops, if-else, wait, arguments, constant, in-line functions
- Compile, flatten, unroll the sequences
Several outputs are generated out of the box. New outputs are constantly being added.
- System Verilog UVM sequences for verification
- Verilog for validation
- Variety of formats for various Automatic Test Equipment
- Documentation in HTML and other formats.
Improves semiconductor design sequence accuracy and test validity
- A single specification format ensures synchronization between various stages
- Quickly run the verification and firmware tests in the lab.
- Quickly run the post silicon failure test cases in the simulation environment
- Save time by automatically generating the test sequences
- Keeps each design team member aligned with the updated sequences as the project progresses with the updated functionality
ISequenceSpec is available as s a plug-in for popular editors that are commonly used to document registers such as Microsoft Word, Microsoft Excel and OpenOffice/LibraOffice Cal on Windows and Linux platforms. It is also available as a Batch tool to run on the command line in a ‘Make’ based flow.
Licensing options for ISequenceSpec include the following:
- Floating LAN/WAN
- Site License