LIVE WEBINAR: Introduction to SystemRDL (Part 2)
Presented by: Nikita Gulliya and Amanjyot Kaur, Agnisys R&D Engineers
SystemRDL 2.0 Register Description Language is the industry standard from Accellera used for describing control/status registers and memories in circuit designs. SystemRDL human-readable descriptions are used as input to software tools for generating RTL, UVM register model, C/C++ Headers and documentation. Its industry adoption continues to increase because it employs a golden-spec methodology that ensures synchronization of all register design, verification and documentation files from a single source.