SEMICONDUCTOR DESIGN AND VERIFICATION ARTICLES

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Hardware/Software co-design and co-verification of embedded systems with Registers

Introduction Usually, Any Digital Peripheral Custom IP is divided into two sections. One is designed logic circuits based on their...

Vivado Support with IDesignSpec Suite

IDesignSpecTM (IDS) is a product suite that improves the productivity of FPGA/ASIC, IP/SoC, and system development teams. These products encompass...

The Agnisys PSS Extension in VS Code: Enhancing Portable Stimulus Development with Validation, Hinting, and Fast Development

The Agnisys PSS (Portable Stimulus Standard) Extension in Visual Studio Code (VS Code) is an essential tool for hardware verification...

The Agnisys SystemRDL Extension in VS Code: Revolutionizing Register Design Validation and Development

The Agnisys SystemRDL Extension in Visual Studio Code (VS Code) is a powerful tool for hardware designers working with SystemRDL—the...

Clock Domain Crossing Circuitry Generation

  The Agnisys IDesignSpecâ„¢  Suite provides comprehensive clock domain crossing (CDC) circuitry support for both hardware and software. Key synchronization...

Low Power Design Generation

Agnisys IDesignSpec™  optimizes low power design through advanced clock gating. By disabling the clock for inactive registers, IDS reduces dynamic...

Special Functional Safety Features

IDesignSpec™  enhances system reliability in safety-critical applications with features like SECDED, which corrects single-bit errors and detects two-bit errors, preventing...

Bus Interface, Decoder, Bridge IP provided for APB®, AHB®, AXI®

  Agnisys IDesignSpec™  facilitates seamless integration of various bus interfaces through automated generation of decoders and bridges, streamlining the design...

Complex Structures & Complex Register Types

  IDesignSpecâ„¢ provides robust support for complex structures and register types, enabling engineers to define intricate designs with remarkable flexibility...
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