SEMICONDUCTOR DESIGN AND VERIFICATION ARTICLES

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The Significance of the Register Model in UVM

Introduction In the field of hardware verification, the Universal Verification Methodology (UVM) is a powerful framework that provides a systematic...

Leveraging SystemRDL for Efficient Register Modeling in Next-Gen SoCs

SystemRDL, or System Register Description Language, is a specialized hardware description language (HDL) used for specifying registers in digital systems...

Empowering Designers: The User-Friendly World of IDesignSpec GUI Options

Introduction The IDesignSpec™ Suite by Agnisys stands as a versatile solution, simplifying the capture of hardware/software specifications in diverse formats...

Formal Verification through ARV™-Formal

In the dynamic landscape of Very Large Scale Integration (VLSI) design, the ever-growing complexity of Application-Specific Integrated Circuits (ASICs) has...

ARV™ FORMAL Verification

Formal verification is a crucial aspect of ensuring the reliability and safety of systems. ARV stands for Automatic Register Verification...

Achieving Functional Safety Standards with Agnisys Products Suite

Agnisys is an Electronics Design Automation (EDA) company offering tools to automate specification to IP and SoC design and development...

Too Many Iterations? How to Avoid Three Common Problems in Semiconductor Design

Developing semiconductor intellectual property (IP), system-on-chip (SoC) designs, and complete systems is enormously challenging. Even a small error in the...

Taking the First Step in Portable Stimulus Adoption

As chips get ever larger and more complex, one thing is for certain: the electronic design automation (EDA) tools, techniques...

Six Smart Ways Specification Automation Reduces Register Implementation Time

Modern system-on-chip (SoC) devices get more and more complicated each and every day. As the size and complexity of modern electronic...
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