Debug: The Schedule Killer
Debug often has been labeled the curse of management and schedules. It is considered unpredictable and often can happen close to the end of the development cycle, or even after
Read moreAUGER, the First User Group Meeting for Agnisys
As a long-time member of the EDA community, I really believe in user groups. EDA tools are complicated beasts, with many options and different ways to use them, and they
Read moreRegister Automation for a DDR PHY Design
Several months ago, I interviewed Anupam Bakshi, the CEO and founder of Agnisys. I wanted to learn more about the company, so I listened to a webinar that covered their latest
Read moreEmbedded Systems Development Flow
Earlier this year. as part of my coverage of the virtual Design Automation Conference (DAC), I interviewed Agnisys CEO and founder Anupam Bakshi. He talked about the new products they introduced
Read moreAutomatic Generation of SoC Verification Testbench and Tests
December 23, 2020Uttam SarkarComments Off on Automatic Generation of SoC Verification Testbench and Tests
Last month, I blogged about a webinar on embedded systems development presented by Agnisys CEO and founder Anupam Bakshi. I liked the way that he linked their various tools into a common
Read moreCEO Interview: Anupam Bakshi of Agnisys
Although much of the EDA industry has consolidated into the “Big 3” players, there are still plenty of smaller vendors in the