Semiconductor Design and Verification Articles
Adopting New Methods For Faster Development Of RISC-V based SoCs
The growth of new technologies such as artificial intelligence, machine learning, Internet of Things (IoT), virtual/augmented reality and of course, the various technologies for the automotive industry has led to a new ...
Creating Test Sequences for RISC-V Cores and SoCs
By Louie De Luna, Agnisys Chief Product Evangelist The idea of an open-source CPU core was virtually unheard-of ten years ago – let alone using it for commercial applications. The CPU core has been the most critical ...
Most Popular Posts
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Creating Test Sequences for RISC-V Cores and SoCs -
EDA Is Advancing – but Where Are the Women? -
Repurposing von Neumann Architecture with SRAM-based Register Files -
IDesignSpec Provides Complete Register Design Automation
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Not your Average UVM Testbench Generator – Unveiling at DAC 2019 -
DVCon Europe Needs Automatic Register Verification and Generation
Repurposing von Neumann Architecture with SRAM-based Register Files
By Louie De Luna, Agnisys Chief Product Evangelist The conventional von Neumann architecture has been the workhorse of computing for several decades, but with the advent of AI applications and big data the entire ...
Not your Average UVM Testbench Generator – Unveiling at DAC 2019
By Louie De Luna, Agnisys Chief Product Evangelist Being so immersed in the work and technology, it’s easy to forget where we are in this technological revolution. Some of us didn’t really appreciate the impact of the ...
EDA Is Advancing – but Where Are the Women?
By Ishanee Bajpai – Senior Marketing Executive, Agnisys 1981 marked the beginning of EDA as an industry. Within a few years there were many companies specializing in EDA, each with a slightly different emphasis. As the ...
Setting the Stage for the Next Abstraction
By Louie De Luna, Agnisys Chief Product Evangelist As generations of designs evolved from a few hundred transistors to hundreds of billions, our industry abstracted the problem space from transistors to schematics to ...
2015 Year End review – DV Challenges
Wow what a marvelous year 2015 has been to Agnisys, with full of events at the various technical exhibitions, new customers, new features and new products and not to forget – new partnership. It would be unfair to say ...
Musings from ARM TechCon Santa Clara 2015
The first day for exhibitors had lots of foot-traffic. Mostly casual onlookers, but a few who were genuinely interested in Agnisys. Since it was our first foray into ARM TechCon, it was good to meet new set of ...
DVCon Europe Needs Automatic Register Verification and Generation
I feel like a bumblebee, going from the DVCon in US, to the next one in India to then to Europe. All this cross-pollination is exciting and enriching when experiencing the needs of the Semiconductor design engineers ...
DVCon India takes off!
DVCon had a solid start in Bangaluru, India. The audited attendee numbers will be coming in later, but we believe we had approximately 425+ delegates. That is truly amazing for the first year of the event! For me, it ...
Getting Ready for DVCon India 2014
It is penultimate day – the day before the big event! Preparing and launching the first ever DVCon India event feels like taxiing a plane down the runway, ready to take off. It is new; the design was replicated from ...
DAC Day 1: Universal Verification Methodology Adoption – Lots of Room to Grow
The first day of the Design Automation Conference for Agnisys was exciting. We experienced a higher traffic flow than Monday during previous years. This picture shows our booth at the DAC conference. For those of ...
EDA Companies must Collaborate or Die
Recently at the sidelines of DAC, Anupam Bakshi, CEO of Agnisys, Inc. sat down with Karen Bartleson, Director of Community Marketing at Synopsys to discuss a very important topic that is close to the heart of the ...
Using IVerifySpec to test IDesignSpec: A case of doctor eating his own medicine!
IDesignSpec generates several outputs from a single spec. We started out as a simple tool that just dealt with registers. After 6 years the tool has metamorphosed into an Executable Spec tool for Digital design. This ...
IDesignSpec Provides Complete Register Design Automation
Published on 05-19-2013 07:30 PM in Semiwiki It goes without saying that registers play a vital role in designing any ASIC, FPGA, SoC or System. In today’s world, while designing SoC with multiple IPs and ...
Agnisys makes Design Verification process extremely efficient!
Agnisys Inc. was established in 2007 in Massachusetts, USA, with a mission to deliver innovative automation to the semiconductor industry. The company offers affordable VLSI design and verification tools for SoCs, FPGAs ...
Customer’s Music and DVCon 2012
The buck stops at the CEO. DVCon 2012 happenings from our perspective.
Age of cooperation, is it?
Its heartening to see greater cooperation between various EDA companies, both big and small. The ongoing work under Accellera for UVM, UCIS and IP-XACT is testament to this fact. It is often bemusing to see the push ...